Joined: June 2006
This post belongs on the DaveScot's Greatest Hits album:
|Actually Tom, they’re mosfets if you want to get techincal about it, and there are two mosfets in the most basic logic gate (inverter). A NAND gate requires four mosfets. Even assistant professors of computer science at Texas Tech should know that all other logic gates can be constructed from NAND gates.|
What assistant computer science professors at Texas Tech probably don’t know is that microprocessor simulations, prior to creating the first mask, absolutely have to model at the gate level because of something called propagation delay which can result in something called race conditions. I was whipping out the fuse programming for programmable logic arrays while you were still in high school and I didn’t have the benefit of simulators way back then. Prop delays had to be calculated by hand to eliminate race conditions just as they had to be when designing with discrete TTL logic which I did for many years before logic arrays were invented. In 1991 I implimented the core logic for an 80486 motherboard in 19 discrete PALs with nothing but PALASM and hardware design genius.
Google it in all the spare time you have now that you’ve been booted off Uncommon Descent for your nasty habit of getting personal.
Condescension, ignorance, and braggadocio all rolled up in a few short paragraphs, topped off by a sociopathic and hypocritical booting of one of the few knowledgeable participants at UD.
"I wasn't aware that classical physics had established a position on whether intelligent agents exercising free were constrained by 2LOT into increasing entropy." -DaveScot